Resource Center:   Linux       Home/Home Office       Convergence      Enterprise       E-Biz  

Search Archive

Home Site Map Media Kit Print Media Kit Feedback Help  Newsletters jobs@Cybermedia Contact Us

• For the most updated version of this V&D100 survey data, go to voicendata.com • Learn about the upcoming CyberMedia events


Home > Global News
 

 Brocade partners IBM to expand IP networking footprints in India
 HP launches 'Touchsmart' printers
 AMD appoints Nicholas Donofrio
 SITA to conduct three-day expo
 iBall introduces Li'l Book
 Indian CIOs more progressive compared to global counterparts: IBM
 Greenlight Technologies partners with Logica
 Unlimited access with Aten digital KVM extension solution
















Insight Enablers

Tyresoles increases productivity by 15%

Creating Enterprise Services Architeture Road Map

Visible benefits with ERP

In Trading improves business productivity by 40%

Godrej Case Study

Intel research chip advances 'era of Tera'
 

 
DQC NEWS BUREAU
 
Wednesday, March 07, 2007

 

Intel Corporation researchers claim to have developed the world's first programmable processor that delivers supercomputer like performance from a single 80-core chip. This chip is not larger than a fingernail and consumes less electricity than most of our home appliances. This development is the result of the company's innovative 'Tera-scale computing' research aimed at delivering Teraflop-trillions of calculations per second-performance for future PCs and servers.

According to reports Teraflop performance and the ability to move terabytes of data, will play a pivotal role in future computers by empowering them with new applications for education and collaboration as well as enabling the rise of high-definition entertainment on PCs, servers and handheld devices. For example, artificial intelligence, instant video communications, photo-realistic games, multi­media data mining and real-time speech recognition, once deemed as science fiction in Star Trek, have become everyday realities.

80-core teraflops research chip

Intel has no plans to bring this exact chip, designed with floating point cores, to market. However, the company's Tera-scale research is instrumental in investigating new innovations in individual or specialized processor or core functions, the types of chip-to-chip and chip-to-computer interconnects required to best move data and most importantly, how software will need to be designed to best leverage multiple processor cores. Teraflop research chip has offered specific insights in new silicon design methodologies, high-bandwidth interconnects and energy management approaches.

“Our researchers have achieved a wonderful and key milestone in terms of being able to drive multi-core and parallel computing performance forward,” said Justin R Rattner, CTO, Intel. “It points the way to the near future when Teraflop-capable designs will be common and will reshape what we can all expect from our computers and the Internet at home and in the office.”

The first time Teraflop performance was achieved in 1996, on the ASCI Red Supercomputer built by Intel for the Sandia National Laboratory. That computer, powered by nearly 10,000 Pentium pro processors, took more than 2,000 sq ft area, and consumed over 500 kilowatts of electricity. And now Intel's research chip has achieved the same performance on a multi-core chip that can rest on the tip of a finger.

This 80-core research chip shows Teraflop performance while consuming only 62 watts, less than many single-core processors consume today. The chip features an innovative tile design in which smaller cores are replicated as 'tiles', making it easier to design a chip with many cores. Intel's discovery of new and robust materials to build future transistors lays a path to manu­facture multi-core processors with billions of transistors more efficiently in future.

The Teraflop chip also features a mesh like 'network-on-a-chip' architecture allowing super high bandwidth communications between the cores, and is capable of moving terabits of data per second inside the chip. The research also investigated methods to power cores on and off independently, so only the ones needed to complete a task are used, providing more energy efficiency.

Further Tera-scale research will focus on the addition of 3-D stacked memory to the chip as well as developing more sophisticated research prototypes.

Page(s)   1  


End of the article

Related CIOL links   External links  

 



Read Previous Global News...






ZTE:Leading CDMA Technology


Extraordinary Networks:Freedom of Choice







Previous Stories

Intel first to demonstrate working 45nm chips

Freescale and IBM sign tech development agreement

AMD expands AMD64 Longevity Program

Message boards

Discuss this and many other IT topics at the
CIOL message board

Google
  Web dqchannels.com

 
DQ Channels Other CyberMedia web sites   Cyber India Online Ltd.
 

 CyberMedia India Ltd
Copyright © CyberMedia All rights reserved.
Reproduction in whole or in part in any form or medium without express written permission is prohibited.
Usage of this web site is subject to terms and conditions.
Broken links? Problems with site? Send email to webmasterciol@cybermedia.co.in